Startseite » Allgemein »

Central verification of conditions

High-grade test adapters can keep the yield in production test
Central verification of conditions

As clock frequencies increase, the quality of adapters used in production tests of integrated circuits becomes increasingly important for the reliability of results. However, in the past it has rarely been practice to measure or even assess the signal integrity of a test adapter or load board. Advantest ensures high quality in its test adapters by using first-rate materials, a careful design and most significantly by a comprehensive verification of parameters or performance, respectively.

Andreas Sittinger, Advantest Test Solutions GmbH, Germany

For the final check of complex digital components, systems-on-a-chip (SoC) or memories, focus is primarily on the test system’s specifications. The most important factors here include parameters such as the maximum test pattern rate, the overall timing accuracy (OTA) or the number of test pins. Whether the high-frequency signals generated by the tester (can achieve or exceed 1GHz) actually reach the device under test (DUT), in what signal shape and whether anything useful can then be done with them: all that is a quite separate matter, which in the past has tended to receive almost no attention at all. For the time being, confidence in the tester’s specifications is still unshaken. But for high pattern and operating frequencies, the issue of test adapter quality is essential and has to be solved.
Various tests are performed during the complex process of IC manufacturing which consists of numerous separate production steps. The purpose of any test is to detect possible problems and process deviations at a very early stage, in order to keep yield up and to avoid further processing of inappropriate parts. The basic tests in the making of semiconductor devices include continuous monitoring of essential core parameters on the wafer during the manufacturing process, functional testing of the dies on a wafer after the last processing step, and eventually burn-in and final checking after dicing or packaging, respectively. Each of these stages demands special test systems and adapters.
Each test stage requires a specific solution
Starting with the processing of a wafer, various measurements are taken to assist with process control, with the aim of ensuring high and consistent quality. As the chip does not yet possess any adequate functionality, however, such measurements are limited to characteristic electrical parameters.
A complete functional test of all the single circuits or dies on a wafer – the 100% wafer test – is not performed until after the last process has been finished. It is done using a wafer prober to contact several circuit structures simultaneously and verify their functionality. This functional test is typically carried out under almost normal operating conditions and at ambient tem-perature, but usually not at the full clock frequency of the DUT. Failing circuits are noted by the system in the wafer mapfile or inked on the wafer, and these dies are then excluded when the wafer iscut.
After the wafer has been cut into individual chips and after the packaging step, there is a comprehensive final test as a prerequisite before delivery to customers. Functional test systems are used to check the functions of a chip, and to ensure that they are performing according to specification. These tests are also carried out at changing supply voltages and during burn-in procedures at raised operating temperatures. As a final step, components such as processors or memories then are sorted according to their performance characteristics.
High requirements put on test system and adapter
Each of these main checking steps makes use of test systems and adapters matched to the specific requirements of the stage. At the wafer level, probe cards are used which typically contact up to 32 DUTs simultaneously. At this point, the primary concern is a high degree of probe and card mechanical accuracy, with the high-frequency characteristics not yet being critical, owing to the lower frequencies at which the tests are carried out. This will change sharply in the future, when these tests too have to be carried out at full clock frequency. In the course of burn-in procedures, large numbers of devices are processed simultaneously. Speed is not an important feature on the burn-in boards, but the decisive factor is the performance and reliability of the test sockets and the whole unit under high temperatures.
At present, the most extensive functional test is performed only after packaging is completed. (In case unpackaged, advanced dies are the endproduct, final verification takes place with the know-good-die (KGD) practice.) Anyhow, at this point, the component tests are run at full clock rates and the suitable devices are then classified in accordance with their performance (binning). In order to keep test costs low and throughput high, manufacturers are concerned to keep the testing time as short as possible. Together with optimizations in test programs, the most significant way to achieve this lies in checking the greatest possible number of DUTs in parallel. However, that is heavily dependent on the type of component involved. As a general rule, only one complex analog or mixed-signal chip can be tested at a time, while with SOCs an average of 4, and with memories up to 128, can be tested simultaneously by one test head. Normally, a system can be fitted with one or two test heads.
The design of the adapter is also heavily dependent on the type of component. With analog or mixed-signal chips, additional on-board components are often needed for the test, while with memories 1:1 wiring is possible. The bandwidth with RF or mixed-signal components ranges from DC up to several tens of GHz for some applications. However, only a very low number of test channels are in general operated at such high frequencies. The total number of channels is usually around a few hundred. With memories and complex digital devices, clock rates varying from some hundreds of MHz up to the GHz range are now standard. By contrast, with RF chips the majority of test channels operate at these high cycles. In addition, test systems for SoCs have over 1000 channels, while parallel testing of a large number of memory components can easily require well over 3000 pins and the associated driver electronics.
Decisive factor: the integrity of signals
At high frequencies in the hundreds of megahertz or in the gigacycle range, it is no easy task to make the signals from the test system reach the DUT, through many lines running in parallel and with several intermediate contacts, and to do so with the highest possible degree of integrity. There would be no point in having a test system with a high timing accuracy if the adapter was falsifying the signals. The primary causes for such problems include variations of signal propagation time, reflections and crosstalk.
Problems of this nature have an impact primarily at the final test with SOCs and memories, since this is where the tests are run at very high frequencies, and because the adapters/load boards contain large numbers of contacts and wires. With RF or mixed-signal components, on the other hand, the number of high-frequency channels is very low, often accounting only for single pins, with the result that fewer crosstalk-related problems occur here. Additionally, for single wires it is possible to make a greater investment in routing, shielding and quality of contacts. Just accommodating the thousands of wires in an adapter for digital application is a challenge all by itself (figure 1).
To achieve a high level of signal integrity in spite of these difficulties (figure 2),Advantest uses special coaxial wires in adapter designing. They have an impedance of 50h and are only 1mm in diameter. To ensure that the DUT will be subjected only to minimum variations in signal propagation time, resulting from the differing distances between the test head and the device pin, the adapters have to be manufactured to tight tolerances. Studies on conventional adapters have shown that significant propagation time discrepancies often occur, which, taken over all the pins, can amount to several hundred picoseconds (figure 3). These discrepancies are thus of the order of magnitude of the overall timing accuracy (OTA) of the testers and consequently can have a negative impact on the test results, particularly in the case of very fast digital components.
Considerable care is also needed with the connections inside the adapter, for example the coaxial-type conductor between mainboard and socket board. Finally, the layout of the socket board, which is the actual interface to the component, also requires a very careful design. Particularly in the case of high-count BGA-type (field array) packages, in which the bump pitch is now becoming even smaller, many conductors have to be arranged into a tiny space, requiring impedance-controlled routing of the conductor tracks and the realization of up to 20 board layers. Even with highly innovative manufacturing methods, microvia technology and conductor track widths of only 80µm, this represents a serious challenge. The important thing is to have overall uniform and defined conditions with low reflections in the signal path. High-grade connection methods and the accuracy of soldering play an important role here (figure 4).
Better safe than sorry
Careful manufacture and high-quality materials are not enough, on their own, to ensure high quality in adapters. That means also testing the completed adapter on its own, in order to be sure that there have been no faults in manufacture and that stringent specifications have been met. A continuity test to discover wiring errors and a visual inspection to locate mechanical damage are utterly far from sufficient. Many phenomena occur only at high frequencies, and would thus not be revealed until the application during final chip testing. In order to protect its customers from such unwanted effects, Advantest has developed the Test Fixture Characterization System (TeFiCS), specifically for verifying adapters or load boards. This equipment can automatically check and describe the entire wiring of an adapter within a short time, using frequency domain reflectometry (FDR) of up to 8GHz. Evaluation of the rise time and step response histograms allows rapid and simple detection of problems such as excessively non-uniform propagation time delays or impedance differences. Advantest now tests all the adapters it produces with this configuration, and supplies the test reports along with the adapters. The experience of its customers has shown that this extra step is well worth the effort.
The times when an adapter or load board was regarded as just some wires between a tester and the device under test are long gone. Now, the adapter has evolved into a very demanding piece of equipment requiring considerable expertise to design and manufacture. Moreover, its performance will have decisive influence on the test results and the yield in a wafer fab line. Since clock frequencies and timing accuracy of semiconductor components will undoubtedly increase still further, the quality of an adapter/load board is even more imperative.
EPP 231
Zusammenfassung
Zu einer Zeit als man in der Schlußprüfung der IC-Fertigung nur wenige Megaherz Signalfrequenzen bewegte, war der Aufbau von Prüfadaptern bzw. Loadboards undramatisch. Doch nun sind abhänig vom Bausteintyp, bei System-on-a-Chip sind durchaus einige Gigaherz angesagt, Übersprechen, Reflektionen durch Fehlimpendanzen usw. unerwünschte Effekte, die das Ergebnis der Prüfungen und damit die Ausbeute beeinträchtigen. Außerdem muß sichergestellt sein, daß auch bei hochpoligen ICs die Zeitabweichungen der Signale über alle Pins (Skew) innerhalb sehr eng spezifizierte Laufzeit-Toleranzen liegt. Nun gibt es erstmalig ein System, daß Parameterkontrollen an Adaptern vornimmt.
Résumé
A l’époque où l’on n’avait recours, pour le contrôle final dans la fabrication de CI, qu’à des signaux de quelques mégahertz, la réalisation d’adaptateurs de contrôle ou de „loadboards“ n’était pas problématique. Mais aujourd’hui, suivant le type de composant (avec le „system-on-a-chip“, on est à plusieurs gigahertz), la diaphonie, les réflexions dues à des mauvaises impédances, etc. sont autant d’effets indésirables qui nuisent au résultat des contrôles, donc au rendement. En outre, il est nécessaire de faire en sorte que les écarts temporels des signaux de toutes les broches (skew) respectent des tolérances extrêmement serrées, même pour les CI à grands nombres de contacts. Il existe, pour la première fois, un système qui effectue les contrôles de paramètres sur les adaptateurs.
Sommario
Ai tempi in cui durante il controllo finale della produzione di circuiti integrati si lavorava con frequenze di segnale di pochi Megaherz, la costruzione di adattatori e di loadboards non era particolarmente drammatica. Oggi però, a seconda del tipo di modulo cosìccome con System-on-a-chip, si fa uso di alcuni Gigaherz, con il rischio di sovramodulazione, di riflessioni a causa di impedenze non corrette, vale a dire effetti indesiderati che vanno a compromettere il risultato dei controlli e dunque la quantità utile di prodotti. Bisogna inoltre garantire che anche nel caso di circuiti integrati ad alto numero di poli gli scarti temporali dei segnali su tutti i piedini (Skew) si trovi entro tolleranze molto ristrette. È ora disponibile per la prima volta un sistema che controlla i parametri sugli adattatori.
Unsere Webinar-Empfehlung
INLINE – Der Podcast für Elektronikfertigung

Doris Jetter, Redaktion EPP und Sophie Siegmund Redaktion EPP Europe sprechen einmal monatlich mit namhaften Persönlichkeiten der Elektronikfertigung über aktuelle und spannende Themen, die die Branche umtreiben.

Hören Sie hier die aktuelle Episode:

Aktuelle Ausgabe
Titelbild EPP Elektronik Produktion und Prüftechnik 1
Ausgabe
1.2024
LESEN
ABO
Newsletter

Jetzt unseren Newsletter abonnieren

Webinare & Webcasts

Technisches Wissen aus erster Hand

Whitepaper

Hier finden Sie aktuelle Whitepaper

Videos

Hier finden Sie alle aktuellen Videos


Industrie.de Infoservice
Vielen Dank für Ihre Bestellung!
Sie erhalten in Kürze eine Bestätigung per E-Mail.
Von Ihnen ausgesucht:
Weitere Informationen gewünscht?
Einfach neue Dokumente auswählen
und zuletzt Adresse eingeben.
Wie funktioniert der Industrie.de Infoservice?
Zur Hilfeseite »
Ihre Adresse:














Die Konradin Verlag Robert Kohlhammer GmbH erhebt, verarbeitet und nutzt die Daten, die der Nutzer bei der Registrierung zum Industrie.de Infoservice freiwillig zur Verfügung stellt, zum Zwecke der Erfüllung dieses Nutzungsverhältnisses. Der Nutzer erhält damit Zugang zu den Dokumenten des Industrie.de Infoservice.
AGB
datenschutz-online@konradin.de