Automated silicon nails increases test coverage

Automated Silicon Nails software from Agilent enables users to increase in-circuittest coverage on limited-accessboards, while saving up to two hours of test development time per device. The Silicon Nails benefits manufacturers in three ways: it enables the application of digital boundary-scan testing to non-enabled parts that otherwise could not be electrically tested; it automatically translates physical, nail-based digital tests for non-boundary-scan devices into tests with diagnostic information without user intervention; and it eliminates the time spent in laborious and manual processing of device-specific tests. Designed to address the problems caused by reduced component geometry and test pads, the Silicon Nails feature the following: automatic generation of the complete Interconnect Test Language (ITL) file, which draws from board topology, board access information, boundary-scan Description Language (BSDL) specification of the parts, and the library for the target silicon nails to create the declaration section and parallel vectors; final test and diagnostics files developed when the boundary-scan program generator reads the ITL file; enhanced tools for debug, including explanatory comments to make the test vectors easier to understand; testability reports and data logging; and advanced tool syntax for manual support of disabling via silicon nodes.

EPP 239